Semiconductor Packaging

Protect interconnects.
Release package stress.

For automotive chips, consumer devices and power modules, material selection is built around capillary flow, low CTE, high Tg, conductive attach, edge reinforcement and thermal management.

Application scope

Every interface from die to underfill contributes to package life.

Materials must fit narrow gaps and production takt time while controlling thermal stress, ionic contamination and moisture aging.

01

Capillary underfill

Uniform flow beneath the die to protect solder joints and interconnects.

02

Corner and edge bonding

Localized reinforcement for drop, bend and mechanical reliability.

03

Die attach and conductive bonding

Electrical and thermal connection for die-attach workstations.

04

COF and fine-pitch protection

Protection of fine-pitch leads, joints and flexible package areas.

05

Power devices and thermal interfaces

Stable thermally conductive, insulating or conductive interfaces.

06

Sensor and module encapsulation

Fixation, sealing and environmental protection for MEMS and sensors.

Key challenges

Precision workstations require material, structure and process to be validated together.

A single material property cannot predict long-term module performance.

01

Fast capillary flow

Complete fill within the target gap with minimal voiding.

02

Low CTE and high Tg

Reduce stress across die, joints and substrate during thermal cycling.

03

Low ions and high purity

Control corrosion, leakage and electrochemical migration.

04

Adhesion and warpage

Maintain interfaces across silicon, solder mask, substrate and metals.

05

Dispense and cure window

Balance pot life, flow, preheat and final cure takt time.

06

Automotive reliability

Retain package integrity after thermal, humidity, drop and vibration loads.

Material directions

Select chemistry from failure modes and process window.

Specific grades will be added after TDS, appearance and application boundaries are verified.

Route 01

Capillary underfill epoxy

Fast flow, low voiding, low CTE and high Tg.

Route 02

Corner and edge reinforcement

Localized mechanical reliability without full-area fill.

Route 03

Conductive silver die attach

Dispensability, electrical and thermal conduction, and interface stability.

Route 04

High-purity encapsulation

Low-ionic protection for COF, fine-pitch leads and sensitive electronics.

Current project foundation

A direct program has entered an automotive-chip underfill workstation.

The public page describes only anonymized application status; product grades and parameters will follow verified TDS data.

Program 01

Automotive-chip underfill

MoleLinker underfill material is used at an automotive-chip packaging station for a leading domestic new-energy vehicle company, with focus on flow, thermal stress and long-term reliability.

Program 02

Packaging material platform

The R&D platform spans underfill, conductive attach, COF protection and thermal interfaces for further matching to die, substrate and process window.

Evaluation path

Validate with real parts and production conditions.

Coupons support screening; final decisions come from the target structure and reliability profile.

01

Define workstation

Confirm substrates, gap, volume, keep-out zones, functional boundaries and target life.

02

Match the process

Define dispense, open time, cure, fixtures and production takt.

03

Screen real parts

Check flow, cure, adhesion, cleanliness, appearance and functional impact.

04

Validate reliability

Retest strength, position, function and interface integrity after aging.

TDS information to add

Key fields required for product matching.

No product grade is assigned until verified public or internal data supports the target use.

  • Chemistry and cure mechanism
  • Appearance, color and filler type
  • Viscosity, thixotropy and flow distance
  • Gap and die-size range
  • Working life, preheat and cure conditions
  • Tg, CTE and modulus
  • Ionic content, water absorption and purity
  • Shear, pull and drop reliability
  • Void rate and fill completeness
  • Thermal conductivity, volume resistivity and insulation
  • Substrate, solder mask and surface treatment
  • Thermal cycling, humidity, reflow, vibration and automotive results

R&D foundation

Connect material design with production validation.

Dr. Zhang and the founding R&D team

The team has developed semiconductor underfill, conductive silver adhesives, low-temperature sintered silver, COF protection and thermal-interface materials, from resin and filler design through dispense, cure and reliability validation.

This describes prior team experience. Each MoleLinker grade must be validated in the customer application.

Start with the workstation

Tell us the device, substrates and reliability targets.

Before assigning a grade, we can define the material direction and evaluation plan.

Discuss your application ↗